Field
Embodiments of the present disclosure generally relate to a method for forming a low-k dielectric material on a semiconductor substrate. More specifically, embodiments described herein relate to a process of forming a low-k film that includes the use of a supercritical CO2 process.
Description of the Related Art
For advanced node technologies, interconnect RC delay (switching performance) and power dampening due to capacitance are critical thresholds of device performance. Given the scaling performance limitations of conventional low-k materials in lowering the dielectric constant (k value) as a result of compromising mechanical strength and current leakage performance, one promising candidate for capacitance scaling includes the adoption of air gaps or porous structures between metal wiring. Air gaps, which have a k value near 1.0, help reduce the overall effective k value to acceptable levels within the device. However, air gap integration generally includes additional processing steps, including exclusion mask lithography, dielectric recess, liner deposition, dielectric deposition, dielectric chemical mechanical polishing (CMP), etc. Moreover, the lack of any material in the air gap may compromise the structural integrity of the air gap, which may lead to device failure.
Other concerns regarding the formation of low-k materials are also prevalent. Most current wet cleaning techniques utilize a liquid spraying or immersion step to clean a substrate. Drying of the substrate that has high aspect ratio features and/or low-k materials, which have voids or pores, is very challenging. Capillary forces created between the cleaning liquid and the substrate surfaces found within pores, vias or other similar substrate structures often cause deformation of materials in these structures, which can create undesired stiction that can damage the semiconductor device and/or substrate. Since capillary forces are often quite large, a residual amount of cleaning solution and/or residue may also be left within these small structures after standard drying processes are performed on the substrate. The aforementioned drawbacks are especially apparent on substrates with high-aspect-ratio semiconductor device structures using conventional thermal drying techniques on the substrate. Current workable drying practices are facing an ever increasing challenge as a result of rapid device scaling advancements.
Thus, there is a need for improved methods of forming and/or cleaning low-k materials formed on a substrate.